demo stuff

[Alistair Woodman]

Ok so I'm going to buy the following

2 More Acer PCs
1 more 5 port switch
2 USB Ethernet dongles

/a

Sent from my iPhone

On Mar 17, 2012, at 14:48, Dave Taht <dave.taht at gmail.com> wrote:

> On Sat, Mar 17, 2012 at 2:32 PM, Francis Dupont <fdupont at isc.org> wrote:
>>> An example of a problem that we ran into was that packets can come in
>>> misaligned, and the default code generated spent much time in
>>> unaligned traps.
>> 
>> => I don't code things as *(u_short *)foo when foo is a random pointer.
> 
> well good, but you probably assume that things like ipv6 addresses
> are aligned, and if they are not, merely comparing two addresses
> can cause 8 times the unaligned instruction traps than ipv4 does.
> 
> I note that the fix (and why I mentioned it in regards to your
> reference to checksums) for ipv4 was in the csum_partial
> routine for ipv4, where only 8 traps cut forwarding performance nearly
> in half....
> 
> I'll stop whining now and get to work...
> 
> oh, I only pointed to the cerowrt bug list. this is the overall
> openwrt one. just the open bugs
> 
> https://dev.openwrt.org/query?status=assigned&status=new&status=reopened&order=id&col=id&col=summary&col=milestone&col=status&col=type&col=priority&col=component&milestone=!Kamikaze+Bugs+Paradise&milestone=!Kamikaze+Features+Paradise&report=12&desc=1
> 
>>> http://www.bufferbloat.net/issues/195
>> 
>> => I agree it is a sure way to get poor performances.
>> 
>>> For further elucidation on the problems working on embedded hardware
>>> can induce vs working on easy stuff like the mainline architectures,
>>> please view
>>> 
>>> http://www.bufferbloat.net/projects/cerowrt/issues
>> 
>> => for me the mainline architecture is not the x86, in particular
>> in its 32 bit modes.
> 
> x86_64?
>> 
>> Regards
>> 
>> Francis Dupont <fdupont at isc.org>
> 
> 
> 
> -- 
> Dave Täht
> SKYPE: davetaht
> US Tel: 1-239-829-5608
> http://www.bufferbloat.net
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