9.4.0rc2 and powerpc

Mark Andrews Mark_Andrews at isc.org
Wed Feb 7 23:46:13 UTC 2007


	I'm trying to work out if this patch will break and
	platforms that are based to the powerpc.  It was written
	to address problems with linux and powerpc.

	I'm especially worried about Macs.

	Mark

Index: lib/isc/powerpc/include/isc/atomic.h
===================================================================
RCS file: /proj/cvs/prod/bind9/lib/isc/powerpc/include/isc/atomic.h,v
retrieving revision 1.1.6.3
diff -u -r1.1.6.3 atomic.h
--- lib/isc/powerpc/include/isc/atomic.h	1 Sep 2005 03:39:13 -0000	1.1.6.3
+++ lib/isc/powerpc/include/isc/atomic.h	7 Feb 2007 03:35:12 -0000
@@ -74,10 +74,10 @@
 
 	__asm__ volatile (
 		"1:"
-		"lwarx r6, 0, %1\n"
-	    	"mr %0, r6\n"
-		"add r6, r6, %2\n"
-		"stwcx. r6, 0, %1\n"
+		"lwarx 6, 0, %1\n"
+	    	"mr %0, 6\n"
+		"add 6, 6, %2\n"
+		"stwcx. 6, 0, %1\n"
 		"bne- 1b"
 		: "=&r"(orig)
 		: "r"(p), "r"(val)
@@ -91,9 +91,9 @@
 isc_atomic_store(void *p, isc_int32_t val) {
 	__asm__ volatile (
 		"1:"
-		"lwarx r6, 0, %0\n"
-		"lwz r6, %1\n"
-		"stwcx. r6, 0, %0\n"
+		"lwarx 6, 0, %0\n"
+		"lwz 6, %1\n"
+		"stwcx. 6, 0, %0\n"
 		"bne- 1b"
 		:
 		: "r"(p), "m"(val)
@@ -107,12 +107,12 @@
 
 	__asm__ volatile (
 		"1:"
-		"lwarx r6, 0, %1\n"
-		"mr %0,r6\n"
-		"cmpw r6, %2\n"
+		"lwarx 6, 0, %1\n"
+		"mr %0,6\n"
+		"cmpw 6, %2\n"
 		"bne 2f\n"
-		"mr r6, %3\n"
-		"stwcx. r6, 0, %1\n"
+		"mr 6, %3\n"
+		"stwcx. 6, 0, %1\n"
 		"bne- 1b\n"
 		"2:"
 		: "=&r" (orig)
-- 
Mark Andrews, ISC
1 Seymour St., Dundas Valley, NSW 2117, Australia
PHONE:	+61 2 9871 4742		         INTERNET: Mark_Andrews at isc.org


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